I just finished Toni’s VGA tutorial and I had a blast; I’m getting good at converting VHDL to Verilog. Next I think I’ll find a RAM tutorial and one for sound. This one didn’t give me too much trouble, but there are a few differences between his tutorial and what I ended up coding.
First, my VGA display has a different resolution than the one used, so I had to find the specifications and adjust them for my monitor. Second, the DE2 board has more output pins dedicated for VGA use; these differences are slight but you won’t get a picture without them. The code comments have the specifics.
One more thing: I don’t use VHDL so I had a little hang-up trying to implement the procedure he uses for drawing the squares. Then I found the ‘task’ keyword for Verilog, which accomplishes the same thing just with slight syntax changes. All the code works great. The PLL generated in QSYS will have to be adjusted for your monitor and you may have to use a different clock input (my case was 50Mhz).